Koenig



Jan. 31, 1956 w. Kom@ JR 2,733,303

BIDIREICTIONAL AMPLIFIERS Filed Aug. 2, 1951 4 Sheets-Sheet l /NI/EA/TORBy W KOEN/G, JR.

Jan. 31, 1956 w. KQENIG, JR 2,733,303

BIDIRECTIONAL AMPLIFIERS Filed Aug. 2, 1951 4 Sheets-Sheet 2 50 F/G. 5F/G. 6

/Nl/ENTOR W KOEN/G, JR.

By JMW ATTORNEY Jan. 31, 1956 w. Kor-:Nuvi JR 2,733,303

BIDIRECTIONAI.. AMPLIFIERS Filed Aug. 2, 1951 4 Sheets-Sheet 3 /m/NTOR yW KOEN/G, JR.

A TTOR/VE V Jan. 31, 1956 w. KOENIG, JR 2,733,303

BIDIRECTIONAL AMPLIFIERS Filed Aug. 2, 1951 4 Sheets-Sheet 4 i ref rc/"im O ZL/ 31.2 o I fp, 30 I fr e g e 6.6 l 'f 1=f e e; d *E @f ff {ef-0f rez fm2 I fbg f2.2 /NVENTOR W KOf-N/G, JR

A TTORNEV UnitedStates Patent O BIDIRECTION AL AMPLIFIERS Walter Koenig,Jr., Clifton, N. J., assignor to Bell Telephone Laboratories,Incorporated, New York, N. Y., a corporation of New York ApplicationAugust 2, 1951, Serial No. 239,947 Claims. (Cl. 179-170) This inventionrelates to four-terminal networks employing transistors.

A principal object of the invention is a bidirectional amplifier.

Another object of the invention is a bidirectional ampliiier havingequal or unequal gain in both directions, as desired.

Another object of the invention is a bidirectional ampliiier which issymmetrical, impedance-wise.

Another object of the invention is a bidirectional amplier which isunsymmetrical, impedance-wise to connect between dissimilar loads.

lt is also an object of the invention to obtain the advantages ofpush-pull operation in a bidirectional amplifier and more specifically,to obtain these advantages without the necessity of either center-tapsin input and output transformers or connections to the pair ofelectrodes, one from each active element, which are connected together.

Other objects of the invention relate to bilateral fourterminal networkshaving various combinations of forward and backward gain, impedance andphase reversing characteristics.

Each of the circuits to be described by way of illustration includes asactive elements semiconductor devices which are known as transistors,various forms of which are described for example in Patent 2,524,035issued October 3, 1950, to I. Bardeen and W. H. Brattain and Patent2,569,347, issued September 25, 1951, to W. Shockley. Each circuitincludes two `transistors connected in four-terminal networkconfiguration but not connected in cascade. In each circuit, twoelectrodes, one from each transistor, are connected together and theremaining electrodes, in pairs, comprise the terminals of the network.The present application is primarily concerned with those embodimentswherein the two electrodes connected together are like electrodes; theembodiments having a pair of unlike electrodes connected together arethe subject matter of my copending application Serial No. 239,948 ledAugust 2, 1951. In all cases, however, at least one pair of outputterminals comprises a pair of unlike electrodes.

The circuits just described have all the advantages of push-pulloperation, e. g., cancellation of even harmonics ICC fore depend, tosome degree, upon the loads between which the circuit s connected andalso upon the signal frequency.

It is unnecessary in any of the circuits herein described to make anyconnection, either in the input or output meshes, to the junction of thetwo transistors except for battery supply purposes. This makes itunnecessary to be concerned with the separate impedances of the twotransistors in the two meshes, which may be unsymmetrical. Transformers,for example, if required, need only match the input and output loads tothe total impedance between the respective terminals.

Bilateral amplifiers are particularly useful as repeaters. A feature ofthe present invention is that with .certain of the embodiments to bedisclosed, direct currentmay readily be supplied to the transistors forbiasing purposes from a remote point over the signalling path whichmakes unattended operation more feasible. Further, no hybrid coils orbalancing networks are required as with conventional 22-type repeaters.Due to the dissimilar impedance characteristics of some of theillustrative embodiments, these networks may serve also as impedancematching devices in addition to providing bilateral gain.

These and other objects and features of the invention may be betterunderstood from the following detailed description when read inaccordance with the attached drawings, in which:

Fig. 1 shows schematically a single transistor;

Figs. 2 and 3 illustrate four-terminal networks to be used in thefollowing explanation;

Fig. 4 shows schematically the equivalent circuit of a i singletransistor amplier connected in grounded base and even order combinationfrequencies, higher power capacity and higher impedance. In addition,they are bilateral which means that the power gain in both directionsis, or can be made, greater than unity. VFurther, certain of theembodiments have equal gain in both directions. Some of the circuitshave symmetrical impedances while others are unsymmetrical. Also, someof the embodiments produce ISO-degree phase reversals while otherstransmit the signals without altering their phase. Certain of theaforementioned characteristics are functions of the terminating or loadimpedances and some are functions of frequency. The particularconguration which is desirable in a given case will thereconfiguration;

Figs. 5 through 16 illustrate schematically balanced transistorsampliers embodying principles of the present invention; and

Figs. 17, 18, and 19 are the equivalent circuits of Figs. 9, 10, and 13,respectively.

In Fig. 1 there is represented schematically one form of transistorknown as a point-contact transistor and which comprises a block ofsemiconductive material 11, for example, N-type germanium, and withwhich an emitter electrode 12, a collector electrode 13, and a baseelectrode 14 make operative contact. In the following description,electrode currents will be` referred to as positive when they ow fromthe electrode into the block of semiconductive material. Therefore, thecurrents ie and ic illustrated in the ligure represent, respectively,positive emitter and positive collector currents. When thesemiconductive body 11 comprises N-type material, the emitter current iewill normally be positive and the collector current ic negative, withthe latter exceeding the former in magnitude. When employed as anamplifier, a'small bias will generally be applied to the emitterelectrode and a large negative bias to the collector electrode. lf thesemiconductive material comprises P-type material coated with a barrierlayer of N-type, the normal current directions and biases just mentionedwill be of the opposite direction and polarity, respectively.

The illustrative embodiments of the invention to be described, and theinvention istelf may be best understood in terms of the four-terminalnetwork properties of the circuits. A brief discussion will, therefore,be given of four-terminal networks in general.

Fig. 2 shows a four-terminal linear network having two externallyavailable meshes of interest, mesh 1 and mesh 2. AssumingY positivecurrents i1 and i2 to be flowing in the external meshes, as shown in theligure, the relationship between these currents and the positiveterminal voltages e1 and e2, where e1, e2, i1 and i2 may be complex 3functions, maybe expressed by the following mesh equations:

e1=1Z11i2Z12 (l) The Zs may also be complex functions and are theconventional impedance parameters of a four-terminal network. Zu is theself impedance of mesh 1 when mesh Z is open and Z22 is the selfimpedance of mesh 2 when mesh 1 is open; Z12 is the impedance whichproduces a voltage drop in mesh 1 due to a current in mesh 2 and Zai isthe impedance which produces a voltage drop in mesh 2 due to a currentin mesh 1.

The impedance or system determinant A of the above pair of meshequations is:

With passive networks, Ziz will equal Zei, as it will even with someactive networks. However, as will be shown when the network involvestransistors, Zia will, in -general, not be equal to Z21.

Fig. 3 shows the equivalent T of a four-terminal network having theimpedance parameters as dened above and including also two voltagesources e1 and ez and two external'impedances Zm and ZLz connectedrespectively in mesh land mesh 2. The above mesh equations willrepresent the current voltage relations of this circuit if to Zn isadded Zrn and if to Z22 is added Znz so that (Z11+ZL1) (Zn-i-Zm) (Zu)(Zei) (4) When driving from mesh 1, 21.1 may be considered the effectiveinternal impedance of the source e1, ZLz the load impedance, and ez willordinarily equal zero. Similarly, when driving from mesh 2, ZLZ willrepresent the internal impedance of the source e2, Zr.1V will be theload impedance and e1 will ordinarily equal zero.

vThe equivalent T representation of a transistor connected in groundedbase configuration is shown inl Fig. 4 in which the emitter impedance isrepresented as Ze, the collector impedance as Ze, the base impedance asZb and the net mutual or transimpedance as Zm. The active element of thetransistor is represented as a voltage generator 15 having a polarity asshown, assuming positive emitter current, and producing a voltage equalto Zme where ie is the signal current flowing in the emitter electrode.As indicated in Fig. 4, the impedances of the equivalent transistorcircuit can be dened in terms of the conventional four-terminalimpedances:

Trl-rm trl-n It may be noted from the above, that as a result of theequivalent generator 15 in the collector circuit of the circuit of Fig.4, 212 is not equal to Zzi for a single transistor in grounded baseconguration. In writing mesh equations for circuits includingtransistors, it must be remembered that rm is a mutual or transimpedancerather than a self impedance and one which produces a voltage drop inthe mesh including the collector electrode, due to a current in the meshincluding the emitter electrode. These meshes, in some circuitalconfigurations, may be the same.

Referring to Fig. 4, a current flowing into the semiconductive body fromthe emitter, i. e., a positive emitter current, will produce a currentflowing out of the semiconductive body to the collector electrode, i.e., a negative collector current, as previously stated; thus theterminal of the equivalent generator 1S remote from the semiconductivebase is positive. The polarity of the equivalent generator terminalsdetermines the sign to be given rm when Writing mesh equations byindicating either a Voltage rise or a voltage drop, depending on thedirection of the assumed positive mesh current in the mesh including thegenerator. For example, in Fig. 4, rm appears only in the Zzi term sinceit produces a voltage drop in mesh 2 due to a current in mesh 1 and itis positive since it is a voltage drop in the direction of the assumedpositive mesh 2 current. The importance of these considerations willbecome more apparent in discussing the four-terminal networks belowwhich each comprise two transistors connected in various configurations.

A useful parameter of transistors is the current gain a which is definedas the ratio of N. N. sin

when ZLi and ZL2 are both zero, or, in terms of fourterminal parametersBy way of illustration, the parameter a for most pointcontacttransistors will exceed unity whereas for most junction transistors, itwill usually be less than unity, often by a very small amount. From thefour-terminal mesh equations, numbers l and 2, when e=0z The currentgain a of a four-terminal network having a voltage source in mesh 1only, is therefor:

Zn 12 a Z22 for the equivalent transistor network in Fig. 4:

Tm 'i' r b 13 a To i 7'b Since both rm and rc are generally very largewith respect to rb:

WJ-m (14) Therefore, the power gain from left to right, i. e., whenapplying energy from a source in mesh 1 to a load connected in mesh 2,is:

By similar analysis, it may be shown that the gain from right to leftfor a generator in mesh 2 and a load in mesh 1 is:

2 G21 41112 Alg From Equations 17 and 18 it may be seen that if {212} isequal to IZ21| the operating gain will be equal in both directions.

For appreciable gain in either direction A must be small and Z12, or,Z21 must be large. Z12 and Z21 will depend only on the transistorparameters and the manner of connection. A, however, is a function ofthe impedances ZL1 and ZL2 connected in the external meshes so that thegain will be dependent on the values of these terminations. It should benoted that in determining A, both resistive and reactive components ofthese impedances must be included. From Equation 4:

The four-terminal parameters Z11, Z12, Z21, and Z22 have not been brokeninto resistive and reactive components since these parameters in thecircuits to be described below are essentially resistances withnegligible reactive components. Therefore, Equation 19 may be expressed:

From Equation 20, if the load impedances have negligible reactivecomponents:

AR: (R11-H1) (Rzz-l-lz) -R12R21 (21) The imaginary term in Equation 24cannot, of course, be subtracted from the real terms even though thealgebraic signs are favorable. To minimize Ax, therefore, it isdesirable that (l) AR and (l1l2) have the same signs so as to subtractfrom each other; (2) the imaginary (j) term equal zero.

The (j) term will equal zero when:

This will occur, for example, `if R11=R12 and if the load impedances areequal and have a 45 degree angle, so that l1=l1=l2=l2. If R11 and R22are both positive,

The driving point impedance looking into mesh 2 is:

Z21Z12 Zu Z3=Z22 From Equations 26 and 27 it may be shown that thedriving point impedances Z1 and Z1 will be equal if Z11 equals Z22. Whenthis condition exists, the circuit is deemed symmetrical,impedance-wise.

From themesh Equations 1 and 2, the following current voltage relationsmay be derived:

=`TZ1 (so) if?? (3o The above equations are useful in determining phasereversals from mesh 1 to mesh 2 or vice versa. Positive directions ofcurrent flow for positive terminal voltages are as shown in Fig. 2. Forexample, it may be seen from Equations 28 and 29 that if Z22 and Z21both have the same sign there will be no phase reversal in the currentflow from mesh 1 to mesh 2, i. e., i1 due to a positive e1 will bepositive and i2 due to a positive e1 will be negative, both flowingclockwise in their respective meshes. Similarly, from Equations 30 and31, if Z12 and Zu have the same sign there will be no phase reversalfrom mesh 2 to mesh 1. These, of course, assume that Z22 and Z21, andZ12 and Z11 have the same phase angle but as previously indicated, inthe circuits of interest herein, these parameters will for most purposeshave negligible reactive components. Reactive components in the loadimpedances will not affect these geni eralizations but only the absolutevalues of the phase angles since they effect only A.

From the foregoing analysis it may be seen that many of the importantfeatures of a four-terminal network and particularly the networks aboutto be described may readily be determined from the network determinant.Each of the specifically disclosed embodiments will thereforebedescribed with reference to its determinant.

Figs. 5 through 16 illustrate twelve four-terminal transistor circuits.Each of these circuits employs two transistors having two meshes ofinterest to which extei-nal circuits may be connected. The circuits ofFigs. 5, 6, and 7 are characterized by the connection of two transistorstogether by like electrodes and by terminals comprising pairs of likeelectrodes. These circuits are simply push-pull versions of singletransistor circuits and therefore comprise no part of the invention butare shown only for illustration. The circuits of Figs, 8, 9, and 10represent embodiments of the present invention and also comprise twotransistors having a pair of like electrodes connected together but, inaccordance with principles of the invention, the terminals to whichexternal circuits are connected comprise pairs of unlike electrodes. The

circuits of Figs. 11 through 16 each comprise a pair of transistorshaving a pair of unlike electrodes connected together; these embodimentsrepresent the principal subject-matter of my copending applicationreferred to above. In all embodiments of the invention, at least onepair of terminals comprises a pair of unlike electrodes, the termterminals being used herein to designate electrodes of the transistorsto which external circuits are connected. For the present, thediscussion will be interested only in those parts of the circuits whichare shown in heavy lines, the remaining portions of the circuits beingeither external connections or battery supply circuits which will bedescribed later.

The determinants for the transistor portions of the circuits of Figs.through 16 are listed in tabular form below. These determinants includeonly the transistor parameters plus a load impedance ZLl which isassumed to be the load impedance across the left-hand pair of terminalsof the four-terminal networks and a load impedance ZLz which is the loadimpedance across the righthand pair of terminals. They also assume thatthe two transistors in each circuit have identical parameters.

*By choice.

For convenience, the four-terminal parameters of each determinant willbe designated By way of illustration and to impart more meaning to thediscussion, the following table sets forth typical values for theequivalent circuit parameters of a transistor.

rc=l9,000 ohms rm=34,000 ohms It may be noted that for most purposes, rband re are negligible with respect to rc and rm. These parameters willof course vary, particularly and most importantly rc and rm since Tm xx-Te These exemplary values, however, illustrate the general magnitudes ofthe various parameters. The circuits of Figs, 5 and 6 are essentiallyunilateral devices since they provide little or no gain in the right toleft direction. This may be seen by referring to their systemdeterminants set forth above since the B terms (i. e., Zn) in each ofthese cases is quite small. These circuits are essentially push-pullequivalents of single transistor amplitiers of the grounded base andgrounded emitter contiguration, respectively, and have the usualfeatures of pushpull operation. The circuit shown in Fig. 7 is disclosedin my copending application Serial No. 212,639, tiled February 24, 1951,which issued December 8, 1953, as Patent No. 2,662,123. Referring to theB and C terms of the Fig. 7 determinant, it may be seen that if oc=2,then [BI==[C\, indicating equal gain in both directions. If a2, the gainin the two directions will be unequal and if al, there will be little orno gain in the left to right direction since if ocl, rmrc so that CMO.

The circuits of Figs. 5, 6 and 7 are characterized by the connectiontogether of a pair of like electrodes and by the utilization of theremaining electrodes in pairs of like electrodes, as terminals, each ofthe pairs cornprising an electrode from each transistor. In Fig. 5, thebase electrodes 23 are connected together, the emitter electrodes 24comprise one pair of terminals and the collector electrodes 25 the otherpair of terminals. In Fig. 6 the emitter electrodes 24 are connectedtogether, through a condenser 36 and the base electrodes 23 andcollector electrodes 25 are utilized as terminals to which input andoutput connections are made. The collector electrodes are connectedtogether in Fig. 7 and the emitter electrodes and base electrodes,respectively, comprise the two pair of terminals of the fourterminalcircuit. In accordance with principles of the invention, bilateraltransmission with gain in both directions may be obtained together withthe advantages of push-pull operation either by connecting together apair of like electrodes from two transistors and utilizing the remainingelectrodes in pairs of unlike electrodes as terminals, or, by connectingtogether a pair of unlike electrodes and utilizing the remainingelectrodes in pairs as terminals, the pairs in all cases comprising oneelectrode from each transistor.

Figs. 8, 9, and l0 illustrate embodiments of the firstmentioned typewhich comprise the subject matter of the present application; these arecharacterized, circuit-wise, by the interconnection of a pair of likeelectrodes and by the utilization of the remaining electrodes in pairsof unlike electrodes as terminals to which output connections may bemade. The electrodes are numbered similarly throughout Figs. 5 through16 so that the exact electrodes connected together and those to whichterminals are connected will not be recited for each case; this beingobvious by reference to the drawings. As with the symmetrical circuitsof Figs. 5, 6, and 7, each has two meshes of interest With theinterconnected electrodes being common to both meshes. Since transistorsare primarily current controlled devices, it is unnecessary to make anyconnection in either mesh to the junction of the two transistors exceptfor battery supply purposes. Therefore, for impedance matching purposes,it is necessary to consider only the total impedance of each mesh anddissymmetry in impedance between the two transistors becomes for thispurpose at least immaterial. For example, the transformers 21 and 22 inFig. 9 need only match the external loads to the total impedancesbetween the respective terminals. It should be noted that transistors,as current controlled devices, have relatively low impedances, comparedto vacuum tubes, between all pairs of elements which lends to their.practicability.

These same features apply also to the embodiments of Figs. 11 through 16which illustrate the second mentioned type, characterized by theconnection together of a pair of unlike electrodes. These embodimentsillustrate the subject matter of my first-mentioned copendingapplication. The external terminals in some cases comprise pairs of likeelectrodes, and in others pairs of unlike electrodes, each embodimenthaving at least one pair of terminals comprising a pair of unlikeelectrodes.

Many of the characteristics and features of the illustrative circuitsmay be understood by referring to their system determinants set forth inthe above table. To simplify the discussion, the transistors of eachpair have been assumed to have the same equivalent circuit parameters sothat the As tabulated above will hold true. It should be noted that evenif there are diiferences in the parameters re, rc, and rb, these can inmany cases be eiectively eliminated by the addition of externalresistors in series with the appropriate electrode.

As previously shown, the operating gain from left to right will equalthe operating gain from right to left if IZ21[=|Z12[, or, using thedesignations per (33) and (34) if B=C. From the above Table I it may beseen that the circuits of Figs. 8, 9, 10, l1, 13, and 16 have bilateralgain which in all cases is equal in both directions. It will not in allcases be appreciable, however. For example, since Tm awthe circuit ofFig. 10 will have little or no 'gain in either direction if mm2. (Ifor-2, |B[=[C[fw0.) If this embodiment is desired, transistors witheither oca-1 or a 2 should be chosen. Similarly, the Fig. 16 embodimentwill have little or no gain if ocl since re is very small. For thisembodiment, transistors having an a of 2 or more Will in most cases bedesirable. The Fig. 13 embodiment will have practically no gainregardless of a since both rb and re are very small. The remainingembodiments having equal gain in both directions, Figs. 8, 9, and ll mayhave appreciable gain, depending largely on the magnitude of A.

The embodiment of Fig. 12 also has bilateral gain which, although nottheoretically equal in both directions, will be substantially equal,since rb and re are Very small. Neglecting these terms for Fig. 12,|BI=[C|=[rm], indicating equal gain in both directions. The embodimentof Fig. 14 will have bilateral gain if aerl. (If a=1, the B termapproaches zero so that there will be little or no gain in the right toleft direction.) It will not, however, be equal in both directionsalthough the gain in the two directions will approach equality as getslarger. The Fig. l circuit will similarly have little or no gain in theleft to right direction if wel. With this embodiment, however, the gainin the two directions will be equal if m2, re being negligible.

As was previously indicated since the power gain in either direction isa function of it is desirable to keep A small. This may necessitateeither selection of transistors having critical as or it may imposelimitations on the terminal load impedances ZL1 and ZLz. However, whenproportioning the values of A,

B, C, and D it ,must be remembered that it is necessary that A bepositive in order that the circuit remain stable. Both considerationsmust, therefore, be kept in mind when proportioning the components of A.

For the present the load impedances Zni and Zin will be assumed to bepure resistances.

The A, B, C, and l) components of the determinant for Fig. 5 will in allcases be positive; the signs of the determinant terms have beenindicated in parentheses above each term in the table. Since A=AD-BC, Awill be small if ADYBC, remembering however that for stability it isnecessary that AD BC. These considerations will be largely determined bythe load impedances.

The A and B terms of the determinant for Fig. 6 will necessarily bepositive and the C term will be negative. Therefore, since (-BC) will bepositive it is desirable in order to keep A small that D be negative sothat the AB term will subtract from the (--BC) term. The fact that the Dterm is negative by choice is indicated in thetable by the asterisk. Arelatively large or will be required to make D negative which will makerm large relative to rc; the load impedance ZLz must not, of course, beso large as to overcome the negative effect of rm. From inspection itmay be seen that the BC term will not be very large. Therefore, since itwill be necessary for stability that BC AD, it will probably benecessary to limit the magnitude of the load impedances ZLi and ZLz.

The B and D terms of the determinant for the circuit of Fig. 7 will inall cases be positive while the C term, if a l, will be negative. It istherefore desirable to make the A term negative to keep A small, whichmay be done by making a substantially greater than l. The limitations onthe load impedance will not be as severe in this case as with theembodiment of Fig. 6 since making a large will also make B and hence BClarge.

The determinant of Fig. 8 affords little opportunity for selection ofparameters since all terms are positive. It may be seen, however, that Awill increase as the load impedances increase so that the power gain ineither direction for the circuit of Fig. 8 will vary in an inverserelation with the load impedances.

The (-BC) term of the Fig. 9 determinant will have a negative sign sinceboth B and C are negative. For stability, therefore, it is necessarythat the (AD) term have a positive sign which requires that A and D beeither both positive or both negative. If the transistors have small s(so that rm is not much greater than rc) to make both A and D negativewill impose severe limitations on the magnitude of the load impedances.It will, therefore, be easier in most cases to make both A and Dpositive which may readily be accomplished with transistors having smallors.

If a is less than 2, the B and C terms of the Fig. l0 determinant willboth be negative; if a is greater than 2 they will both be positive. Ineither case, the (-BC) product will have a negative sign so that forstability it will be necessary that A and D `be either both positive orboth negative. Again by inspection it will be seen that in most cases itwill be easier to make A and D both positive since this may be done withtransistors having small s and without unduly restricting the magnitudeof the load impedances. It is, of course, necessary vthat [AD| |BC[ forstability.

The B, C, and D terms of the Fig. 1l determinant are all positive, sothat the A term must be made positive for stability. This may beaccomplished either with a large Zr.1 or a small u or both. However, itis desirable that the load impedances be kept small to keep A small.

The B term of the Fig. 12 determinant will be negative; the C and Dterms are both positive. Therefore, to keep A small it is desirable tomake A negative, which may readily be accomplished if a is large.

In the Fig. 13 determinant, it is necessary that D be positive-forstability since A, B, and C are all positive D may be made positiveeither by employing a small a or a ZLz or both.

If x 1, as is usually the case with point-contact transistors, the Bterm f the Fig. 14 determinant will be negative, assuming rb negligible,and the A and C terms will be positive, the signs of the latter twobeing independent of the value of et. Therefore, to keep a small it isnecessary to make D negative which will require an a of greater than twoand the larger ZLz the larger must be ot.

The B and C terms of the Fig. 15 determinant have unlike signs, B beingpositive and C negative so that to keep A small it is necessary that theA and D terms also have unlike signs. If the load impedances are equal,the positive portions of the D term will be greater than the positiveportions of the A term by an amount approximately equal to re.Therefore, it will be necessary to make the term D positive and the Aterm negative. -From inspection, this may be accomplished for example,it a is approximately equal to 2 and if Zm is small, which, aspreviously indicated, will also give the device approximately equal gainin both directions.

The B and C terms of the Fig. 16 determinant are both negative and the Aterm is positive. The D term, therefore, must be positive for stabilitywhich will require a small a for small Znzs.

The signs of the determinant terms have been indicated in the abovetable immediately above each term with an asterisk denoting the signsmade such by choice. From these signs the phase reversal characteristicsof the various circuits may readily be determined. As previouslyindicated, there will be no phase reversal in a left to righttransmission if Z22 (D) and Zzi (C) have the same sign. Therefore, itmay be seen that the circuits of Figs. 5, 6, S, ll, 12, and 13 willproduce no phase reversals in a left to right transmission. Further,there will be no phase reversal in a right to left transmission if Zn(A) and Zrz (B) have the same sign so that the same circuits willlikewise produce no phase reversals in a right to lel't transmission.The remaining circuits will produce phase reversals in the transmissionsin either direction.

In most of the l2 illustrative circuits the currents generated in thecollector branches agree in direction with the signal currents as justdetermined. Referring to Fig. 17 for example, which is the equivalentcircuit of Fig. 9, the signal currents i1 and iz have the samedirections as the assumed positive mesh currents for positive sppliedvoltages. Further, these currents agree in direction with the polaritiesof the equivalent generators 27 and 28. The same is true of the Fig.10embodiment whose equivalent circuit is shown in Fig. 18.

In some of the circuits however, there is a conict between the currentsgenerated by the transistors and the signal currents. Fig. 19 forexample is the equivalent circuit for the Fig. 13 embodiment. Theequivalent generator 29 should normally have a polarity as indicated bythe signs in parentheses since the current llowing through rea is intothe base which should result in a collector current flowing out of thebase. As determined above, this circuit produces no phase reversal sothat for a positive e1, the actual signal current i2 will be flowing ina clockwise direction which is in opposition to the polarity of thegenerator 29 as just determined; generator 29 will therefore actuallyhave the opposite polarity. For a positive e2, the current in bothmeshes will be counter-clockwise and the mesh 2 current will then opposethe generator 30 which will then have the opposite polarity to thatshown. The generators 29 and 30 are in effect opposing cach other butthe net current i2, for a positive er, will be in the direction shown. Asimilar com'lict between mesh and equivalent generator currents may beshown to exist in mesh 1 of the Fig. 12 embodiment.

In the above discussion, the transistors in each embodiment have beenassumed to have identical parameters.

If the transistors of each pair should have unlike parameters, however,lit would not alter the principles or the application of ,the presentinvention, but would merely make the analysis of the various elementsmore laborious since it would necessitate, for example, denoting theparameters of each transistor with a unique subscript so that thedeterminant for Fig. 9, for example, would appear:

Tel +7.22 "rml The above determinant will become more apparent byreferring to the equivalent circuit of the transistor portion of Fig. 9shown in Fig. 17, which also includes the equivalent load impedances Znrand ZLz. Since the assumed positive current i1 is, for the uppertransistor, from the base to the emitter, i. e., the current llowingthrough rei, the resulting current in the collector (m) will be from thecollector into the base; therefore, the terminal of the equivalentgenerator 27 adjacent the equivalent T junction is positive, denotingthe direction of the generated collector current flow. In the lowertransistor, the assumed positive current it ows through the emitter(rez) into the base so that the collector current resulting therefromlloWs out of the base and the generator 2S terminal remote from thelower T junction is positive.

,In writing the determinant, a positive current it will produce voltagedrops due to ZL1, rbi, rer, rc2, rc2, and a voltage rise due to rmz;therefore:

as is indicated in the above determinant. rmz is included in theself-impedance term Zri since both rez and rc2 are in mesh 1. A positivecurrent i2 will produce voltage drops in mesh 1 due to rei and rez butthe voltage produced by fm2 due to i2 flowing through rez is of theopposite polarity and more specifically a voltage rise so thatZ12=re11lrezrma Zzi and Z22 are determined by similar reasoning.

To further illustrate these principles, the equivalent circuit of Fig.10 is shown in Fig. 18. The emitter current in the upper transistor owsinto the base so that the terminals of the equivalent generator 3i havepolarities indicating that the collector current resulting therefrom owsout of the base. The current liow in the emitter of the lower transistoris out of the base; the generator 32 therefore has a polarity whichdrives current into the base. From inspection since rmi produces avoltage drop due to positive current flow in rei, and since rmi iscommon to both meshes, rmi will appear in the Zu and the Zzi terms.Further, it will be negative since in both cases it represents a voltagerise for a positive i1. Similarly, rmz will appear in the Zrz and theZ22 terms with a negative sign since it represents a voltage rise inseries with the collector rez due to a current i2 in the equivalentemitted resistance rez. Therefore, for Fig. 18:

The discussion thus far has omitted the battery supply circuits. Ingeneral these circuits comprise means to supply from a common battery arelatively large negative voltage, e. g., -60 volts, to the collectorelectrodes of each pair and a small positive voltage, e. g., one or twovolts, to the emitter electrodes of each pair. The negative currentsupplied to the collector electrodes of each transistor ows principallythrough their associated base electrodes. Small amounts of this current,however are employed to provide the proper bias conditions. To

accomplish this, bleeder resistances are provided connecting the baseand emitter electrodes for direct currents. If the biasing resistorstend to shunt the signal to an undesirable extent, retard coils may beprovided in series with the bleeder resistors in the emitter-base pathor Where necessary. Retard coils may also be used to prevent undesirableshunting of the signal by the collector bias paths. Condensers are alsoused in some instances to shunt the bias resistors at the signalfrequencies.

In Figs. 5, 6, and 8, proper bias potentials are derived from thebatteries 33 by the resistors 34 and 35. Resistors 34 are larger thanresistors 35 so that the emitter electrodes in each case are slightlypositive with respect to their base electrodes. A condenser 36 providesa direct connection at the signal frequency for the emitter electrodesin the circuit of Fig. 6. In Fig. 8 retard coils 37 are connected inseries with the collector biasing path to prevent their unduly shuntingthe signaling currents. A single small resistor 3S is suiicient toprovide proper electrode potentials for the circuit of Fig. 7.

Figs. 9, 11, and 14 are each biased in a similar manner. The collectorbiasing path in each case may be traced from the positive terminal ofthe battery 33 through a .base resistor 39, from the base electrode ofthe lower transistor to the collector electrode thereof, from the latterthrough a base resistor 40 associated with the upper transistor, andthrough the base and collector electrodes of the upper transistorsreturning to the negative terminal of the battery 33. Emitter bias ineach of these circuits is provided by bleeder resistors 41. The baseresistors 39 and 40 in Fig. 9 are by-passed by condensers 42; theseresistors in Figs. l1 and 14 need not be by-passed since the circuits inwhich they are con nected are already high resistance circuits so thatthe biasing resistors 39 and 40 are, to the signal currents, relativelysmall.

The biasing arrangements in Figs. and 13, are also similar. In thesecircuits the collector electrodes 25 are connected together and thenegative terminal of the battery is connected to this junction.Resistors 43 provide a path from the positive terminal of the battery tothe emitter electrodes with retard coils 44 completing the emitter-basedirect-current path.

The biasing arrangements in Figs. l2, 15, and 16 are also similar; thedirect current being fed in each of these cases, to the two transistorsin series. For example, the main direct-current path in Fig. 12 may betraced from the negative terminal of the battery 33 to the collectorelectrode of the upper transistor from the base electrode thereofthrough the retard coil 46 to the collector electrode of the lowertransistor and from the base electrode thereof by way of the by-passedbase resistor 47 to the positive terminal of the battery. Emtter bias isprovided by the bleeder resistors 48. The biasing paths in Figs. and 16may be similarly traced with the exception that a retard coil 49 isincluded in the emitterbase path of the lower transistor in Fig. 16.

Blocking condensers 50 are provided in the circuits of Figs. 5, 8, 10,11, 12, 13, 14, 15, and 16. Also, condensers 36 are connected betweenthe joined electrodes in the circuits of Figs. 6, 9, 12, 13, 15, and 16to block the direct current and still provide substantially a directconnection at the signal frequencies between the joined electrodes. Theconnections between the two electrodes which are common to both meshesin the remaining circuits are inherently high resistance by virtue ofthe mode of connection and in most cases will not require by-passcondensers.

The various configurations fall more or less naturally into differentclasses with respect to the methods of feeding battery to them. Fig. 5,for example, consists of two transistors in a push-pull arrangement;these are more naturally fed in parallel as shown. Figs. 6, 7, 8, 10,and 13 represent other circuits which may naturally be fed in parallel.Fig. 9 is more naturally fed in series; the embodiments of Figs. 11, 12,14, and 15 are other embodiments which may bc fed in series. The Fig. 16embodiment may be fed either in parallel or series, the drawingindicating the latter.

The various configurations also fall into diiiierent classes withrespect to whether they may be fed around the loop or whether a localsource is necessary. Since the terminals of each path in the circuit ofFig. 5 are at the same direct-current potential a local source isnecessary. Similarly, a local source will be necessary for the circuitsof Figs. 6, 7, 8, l0, 13, 14, and 16. The series fed embodiments withthe exception of Figs. 14 and 16 may readily be supplied over a loopsince it will be obvious that in each of these embodiments thetransformers may be located at a point remote from the transistors.These latter embodiments are thus particularly useful for unattendedrepeater operation where it is desirable to maintain the batterysupplies at a central station, as for example in a telephone system.

In some of the cases the battery supply might also be fed over a simplexpath, that is, either plus or minus battery might be supplied to bothsides of the path over the pair of Wires leading to the amplifier with areturn path being provided either by a return wire or by another simplexpath. The circuits of Figs. 5, 6, 7, and 13, for example may be suppliedby this method.

What is claimed is:

1. A bidirectional amplifier for interconnecting a pair of externalcircuits comprising a pair of transistors each having an emitterelectrode, a collector electrode and a base electrode, means connectingtogether the said base electrodes, means connecting one of said externalcircuits in a circuit including the emitter electrode of one of saidtransistors and the collector electrode of the other of saidtransistors, and means connecting the other of said external circuits ina circuit including the collector electrode of said one of saidtransistors and the emitter electrode of the other of said transistors.

2. A bidirectional amplifier for interconnecting a pair of load circuitscomprising a rst and a second transistor each having an emitterelectrode, a collector electrode and a base electrode, means connectingtogether said emitter electrodes, means connecting one of said loadcircuits in a first mesh including the base electrode of said firsttransistor, said emitter electrodes and the collector electrode of saidsecond transistor, and means connecting the other of said load circuitsin a second mesh including the collector electrode of said firsttransistor, said emitter electrodes and the base electrode of saidsecond transistor.

3. A bidirectional amplifier comprising a first and a second transistoreach having an emitter electrode, a collector electrode and a baseelectrode, means connecting together said collector electrodes, a lirstexternal mesh including the emitter electrode of said first transistor,said collector electrodes and the base electrode of said secondtransistor and a second external mesh including the base electrode ofsaid first transistor and the emitter electrode of said secondtransistor.

4. A bidirectional amplifier comprising a rst and a second transistoreach having an emitter electrode, a collector electrode and a baseelectrode, the equivalent collector resistance rc1 and the equivalentmutual resistance rmi of said first transistor being substantially equalto the equivalent collector resistance, rc2 and the equivalent mutualresistance rma of said second transistor, means connecting together saidcollector electrodes, means connecting said transistors in afour-terminal two-mesh network, one of said meshes including the emitterelectrode of said first transistor, the base electrode of said secondtransistor and said collector electrodes, the other of said meshesincluding the base electrode of said iirst transistor, the emitterelectrode of said second transistor and said collector electrodes.

5. The combination in accordance with claim 4 wherein a1=a2=2, where and6. A two-way circuit for interconnecting a pair of energy sources whichcomprises a pair of transistors each having an emitter electrode, acollector electrode and a base electrode, means to apply energy from oneof said sources to a first circuit including, in series within saidfirst circuit, a first pair of unlike electrodes, one electrode fromeach transistor, and a pair of like electrodes and means to apply energyfrom the other of said sources to a second circuit including, in serieswithin said second circuit, a second pair of unlike electrodes otherthan tbe electrodes of said first pair and said pair of like electrodes.

7. A bidirectional amplifier for interconnecting a pair of externalcircuits comprising a pair of transistors each having an emitterelectrode, a collector electrode and a base electrode, means connectingtogether a pair of like electrodes, one from each transistor, a firstseries circuit including said pair of like electrodes and a first pairof unlike electrodes, said first pair including one electrode from eachtransistor other than the electrodes of said pair of like electrodes, asecond series circuit including said pair of like electrodes and asecond pair of unlike electrodes, said second pair including oneelectrode from each transistor other than the electrodes of said pair oflike electrodes and other than the electrodes of said first pair, meansfor connecting one of said external circuits across said first seriescircuit and means for connecting the other of said external circuitsacross said second series circuit.

8. A bidirectional amplifier for interconnecting two circuits comprisinga first and a second transistor, each of said transistors having anemitter electrode, a collector electrode and a base electrode, meansconnecting a first electrode of said first transistor to a firstelectrode of said second transistor which is like the said firstelectrode of said first transistor, a first circuit including, inseries, a second electrode of said first transistor, the said firstelectrodes of said first and second transistors and a third electrode ofsaid second transistor, said second and third electrodes being unlikeelectrodes, a second circuit including, in series, a third electrode ofsaid first transistor, the said first electrodes of said first andsecond transistors and a second electrode of said second transistor,means for connecting one of said two circuits across said first circuitand means for connecting the other of said two circuits across saidsecond circuit, whereby said first electrodes of said first and secondtransistors are common to said two circuits.

9, A four-terminal network for interconnecting a pair of externalnetworks comprising a pair of transistors each having an emitterelectrode, a collector electrode and a base electrode, means connectingtogether a first pair of electrodes, means connecting one of saidexternal networks in a first circuit including, in series within saidfirst circuit, said first pair of electrodes and a second pair ofelectrodes other than the electrodes of said first pair, and meansconnecting the other of said external networks in a second circuitincluding, in series within said second circuit, said first pair ofelectrodes and a third pair of electrodes other than the electrodes ofsaid first andsaid second pairs, each of said pairs of electrodesincluding an electrode from each of said transistors and at least one ofsaid pairs comprising a pair of unlike electrodes.

10. In a two-Way communication system having a first and a secondterminal station, transmission means interconnecting said stationsincluding a bidirectional amplifier, said amplifier comprising a pair oftransistors each having an emitter electrode, a collector electrode anda base electrode, a first circuit including, in series, a first pair ofelectrodes, one from each transistor, and a second pair of electrodes,one from each transistor, a second circuit including, in series, saidfirst pair of electrodes and a third pair of electrodes, one from eachof'said transistors, at least one of said pairs of electrodes comprisinga pair of unlike electrodes, means for applying signals from said rststation across said first circuit and means for applying signals fromsaid second station across said second circuit.

References Cited inthe file of this patent UNITED STATES PATENTS2,531,076 Moore Nov. 21, 1950 2,585,077 Barney Feb. 12, 1952 2,620,448Wallace Dec. 2, 1952

